This invention relates to microelectronic circuits, and in particular to a method of fabrication and a resulting structure for providing crossover connections in such circuits.
Microelectronic circuits such as hybrid integrated circuits employing thin film and silicon integrated circuit chip elements on an insulating substrate enjoy extensive use in sophisticated information processing applications. This has required larger and more complex circuits. The circuits therefore include many areas where it is necessary for conductors placed in a first direction to cross over conductors running in other directions. Typically, such crossover connections are fabricated by plating the crossover on a spacing layer which is then removed to leave an air gap between the crossover connection and the conductor on the substrate which is being crossed. (See, for example, U.S. Pat. No. 3,672,985, issued to Nathanson, et al). Alternatively, an arched conductor element may be bonded to the ends of the conductor on the substrate in order to cross over an intervening conductor. Although such structures are generally satisfactory, they possess the disadvantage that they are not rigid structures, and that during handling the crossover can be shorted to the conductor being crossed. It has therefore been proposed to provide an insulating layer over the conductor being crossed wherein there is a gap between the crossover and insulating layer (see, for example, U.S. Pat. No. 3,461,524, issued to Lepselter) or the crossover is deposited directly on the insulator (see, for example, U.S. Pat. No. 4,000,054, issued to Marcantonio). These structures introduce a crosspoint capacitance which can decrease the circuit frequency response or increase the signal propagation delay. In addition, when the crossover is deposited directly on the dielectric, poor adhesion can result when the coefficient of expansion of the dielectric is not matched to that of the metal and ceramic substrate.
It is therefore an object of the invention to achieve rigid crossover structures with low capacitance which therefore do not significantly impair overall electrical circuit performance.